John S. Baras
University of Maryland, USA
Abstract: Autonomous systems (robots, cars, UAVs) are becoming ubiquitous. They are also increasingly interacting with humans. Safety is a critical requirement for autonomous systems and for their interactions with humans. Trusted autonomy encompasses self-monitoring, self-adjustment and learning to execute complex tasks with safety and high performance. Our approach to these challenging problems utilizes dynamical systems, optimization, artificial potential functions, formal models (timed automata, model checking and contracts), and novel approaches to learning and monitoring. It will be shown that event-based control is essential for trusted autonomy for two reasons: composability and assured safety. Our results will be illustrated in applications to robotic manipulation tasks, human-robot collaboration, path planning, autonomous maneuvering cars, and collaborative UAVs. It will be shown that event based control leads to efficient real-time algorithm implementation in modern neuromorphic chips. Future research directions will be described.
Biodata: John S. Baras is a Distinguished University Professor and holds the endowed Lockheed Martin Chair in Systems Engineering at the Institute for Systems Research and the Department of Electrical and Computer Engineering of the University of Maryland College Park. He received his Ph.D. degree in Applied Mathematics from Harvard University in 1973. From 1985 to 1991, he was the Founding Director of the Institute for Systems Research and since 1992 he has been the Director of the Maryland Center for Hybrid Networks, which he co-founded. He is a Fellow of IEEE, SIAM, AAAS, NAI, IFAC, AIAA, AMS, Member of the National Academy of Inventors and a Foreign Member of the Royal Swedish Academy of Engineering Sciences. Major honors and awards include: 1980 George Axelby Award from the IEEE Control Systems Society; 2006 Leonard Abraham Prize from the IEEE Communications Society; 2017 IEEE Simon Ramo Medal; 2017 AACC Richard E. Bellman Control Heritage Award; 2018 AIAA Aerospace Communications Award. In 2016 he was inducted in the Univ. of Maryland A. J. Clark School of Engineering Innovation Hall of Fame. In 2018 he was awarded a Doctorate Honoris Causa by the National Technical University of Athens, Greece. He has been awarded twenty patents and honored worldwide with many awards as innovator and leader of economic development.
RWTH Aachen University, Germany
Abstract: The ability to learn is an essential aspect of autonomous systems facing uncertain and changing environments. However, the process of learning a new model or behavior often does not come for free, but involves a certain cost. For example, gathering informative data can be challenging due to physical limitations, or updating models can require substantial computation. Moreover, learning for autonomous agents often requires exploring new behavior and thus typically means deviating from nominal or desired behavior. Hence, the question of “when to learn?” is essential for the efficient and intelligent operation of autonomous systems. We have recently proposed the concept of event-triggered learning (ETL) for making principled decisions on when to learn new dynamics models. Building on the core idea of learning only when necessary, we haved developed concrete triggers and theory for different domains. In the context of networked and interconnected systems, ETL leads to superior communication savings over standard event-triggered control. For linear quadratic control, ETL automatically detects inaccurate models and yields improved control performance under changing dynamics. In this talk, we present the concept, theoretical results, and experimental applications of ETL.
Biodata: Sebastian Trimpe is a Full Professor at RWTH Aachen University, where he leads the Institute for Data Science in Mechanical Engineering (DSME) since May 2020. Research as DSME focusses on fundamental questions at the intersection of control, machine learning, networks, and robotics. Before moving to RWTH, Sebastian was a Max Planck and Cyber Valley Research Group Leader at the Max Planck Institute (MPI) for Intelligent Systems in Stuttgart, Germany, where he keeps a side appointment at present. Sebastian obtained his Ph.D. degree in 2013 from ETH Zurich with Raffaello D’Andrea at the Institute for Dynamic Systems and Control. Before, he received a B.Sc. degree in General Engineering Science in 2005, a M.Sc. degree (Dipl.-Ing.) in Electrical Engineering in 2007, and an MBA degree in Technology Management in 2007, all from Hamburg University of Technology. In 2007, he was a research scholar at the University of California at Berkeley. Sebastian is recipient of the triennial IFAC World Congress Interactive Paper Prize (2011), the Klaus Tschira Award for achievements in public understanding of science (2014), the Best Demo Award of the International Conference on Information Processing in Sensor Networks (2019), and the Best Paper Award of the International Conference on Cyber-Physical Systems (2019).
photographer: Annette Cardinale
Fermi National Accelerator Laboratory, USA
Abstract: Silicon technologies have been constantly progressing but intrinsically they will never satisfy demands of performance in HEP projects, so that current available technologies with reasonable cost can always be considered low tech. In our daily design jobs, however, there are rooms for the designers to put in various good thinking to eliminate unnecessary elements or operations which will dramatically reduce silicon area, power consumption and costs for given requirements. Such improvements may enable functionalities that otherwise would be impossible.
The development of FPGA TDC was based on its forerunner developed in ASIC and the TDC implemented using FPGA platform was considered problematic. The limitation of available circuits in FPGA forced the TDC designers to choose unadjustable delay lines with uneven bin widths while calibrating the bin widths using measurement data, which is an approach deviated from its counterparts in ASIC. The approach of using unadjustable delay lines succussed in FPGA platform after efforts of hundreds of developers worldwide in past decade. Today the approach has been transplanted back into AISC TDC and finest bin width allowed by certain technology has been achieved along with significant power reduction.
In this presentation, I will discuss several topics in digital designs including silicon resource saving, power consumption reduction, timing uncertainty confinement, etc. using examples seen in TDC and other digitizers. The discussion will cover several practical building blocks such as digital delay lines, adjustable gated ring oscillators, coarse time counter and data readout circuits.
Biodata: Jinyuan Wu received his B.S. in Space Physics, Department of Geophysics, Peking University, Beijing, China in 1982; M.S. in Micro-Electro- Ultrasonic Devices, Institute of Acoustics, Chinese Academy of Sciences, Beijing, China in 1986; Ph.D. in Experimental High Energy Physics, Department of Physics, The Pennsylvania State University, U.S.A. in 1992. He works in Fermi National Accelerator Laboratory since 1997 primarily on detector electronics and trigger systems for high energy physics experiment. He is IEEE Nuclear & Plasma Sciences Society Distinguished Lecturer.